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#Fpga projects altera cyclone ii how to#
#Fpga projects altera cyclone ii driver#
#Fpga projects altera cyclone ii code#

Here use the EDA tool that comes with Quartus.

As shown in Figure 1.8, select the EDA tool.

Selecting Cyclone 10 LP in the Family, FBGA in the package, 484 in the Pin count, and 8 in the Core speed grage helps narrow down the selection and quickly find the target model.

As shown in Figure 1.7, select the correct FPGA chip model, the onboard chip model is 10CL040YF484C8G.

Since it is a new project, click Next to perform the next step.

As shown in Figure 1.6, you can directly add some files written in advance.

It is recommended that the path is easy to find and convenient for later viewing and calling.įigure 1.5 Name and define the path of the project file

As shown in Figure 1.5, select the correct project path.

You can also click File to create a new project in the toolbar, or press Ctrl+N to create a new project.

As shown in Figure 1.4, after opening Quartus, you can directly click New Project Wizard in the middle of the screen to create a new project.

The specific project establishment steps are shown in Figure 1.4 to 1.9.

#Fpga projects altera cyclone ii how to#

When the FPGA outputs a low level of 0, a current flows through the LED, and it is turned on.įigure 1.3 Schematics of LED 1.3.3 Program Design 1.3.3.1 Start Programīefore writing a program, let’s briefly introduce the development environment we use and how to create a project. The LED module of this experiment board adopts 8 common anode LEDs, which are connected with Vcc 3.3V through 180 R resistors, and the cathodes are directly connected and controlled by the FPGA. The schematics of LED is shown in Figure 1.3. The physical picture of the onboard 8-bit LED is shown in Figure 1.2. The FII-PRA040 uses the LED lights in the red circle.įigure 1.1 Different kinds of LEDs 1.3.2 Hardware Design Up to now, there are many types of LED lights, as shown in Figure 1.1. LED (Light-Emitting Diode), is characterized by low operating current, high reliability and long life. After the last (highest position) LED is lit, the next time it returns to the first (lowest position) LED, the loop is achieved.End reset, LED lights from low to high (from right to left) in turn.Use all LEDS, all light up during reset.Observe the experiment result and summarize it.

Combine hardware resources to perform FPGA pin assignment and implement actual program downloading.

Master the design of the frequency divider to implemnet the runing LED.

#Fpga projects altera cyclone ii code#

Proficiency in the writing of Verilog HDL programs to develop a good code writing style.Practice to use Quartus II to create new projects and use system resources IP Core.Then, implement a state machine that performs a single transfer over the I2C bus using these primitives, ideally some hardcoded command that is immediately visible on the LCD, and then extend from there.Ĭonnecting that to the rest of the design will later require either a rework of clocking the I2C part of the design to use a faster clock and pulses from a divisor that advance the I2C state machine, or a clock domain crossing mechanism, that will be another great learning opportunity.Altera Risc-V FPGA Board Experiment 1 LED shifting 1.1 Experiment Objective

#Fpga projects altera cyclone ii driver#

The third thing you want (also from the IP Catalog) is a bidirectional IO driver for the data line. This is typically done by instantiating a DDR output driver (also in the IP Catalog) that outputs the gate signal while the clock is high, and 0 while the clock is low. So step 1 is to generate an I2C clock with a PLL, you can find the PLL interface in the IP Catalog.Ĭheck that the clock works, then build a gated clock output. The clock isn't very fast, so you can in theory generate the clock as a normal signal by dividing a faster clock, but that is messy to get right since you also need to drive the data line synchronously to that. I2C has a gated clock and a bidirectional data pin, these are your first steps on the low level block, and both are great learning experiences as well: You'd implement a block for the low-level parts of the I2C protocol, and a block that schedules the data transfers, and then evolve from there.